#include <reg52.h>
#include <intrins.h>
typedef unsigned char uchar;
typedef unsigned char uint;
//****************************************NRF24L01¶Ë¿Ú¶¨Òå***************************************
sbit MISO =P1^0;
sbit MOSI =P1^4;
sbit SCK =P1^1;
sbit CE =P1^2;
sbit CSN =P1^3;
sbit IRQ =P1^5;
//************************************°´¼ü***************************************************
sbit KEY1=P2^6;
sbit KEY2=P2^7;
//************************************ÊýÂë¹Üλѡ*********************************************
sbit led1=P2^1;
sbit led2=P2^2;
//*********************************************NRF24L01*************************************
#define TX_ADR_WIDTH 5 // 5 uints TX address width
#define RX_ADR_WIDTH 5 // 5 uints RX address width
#define TX_PLOAD_WIDTH 20 // 20 uints TX payload
#define RX_PLOAD_WIDTH 20 // 20 uints TX payload
uint const TX_ADDRESS[TX_ADR_WIDTH]= {0x34,0x43,0x10,0x10,0x01}; //±¾µØµØÖ·
uint const RX_ADDRESS[RX_ADR_WIDTH]= {0x34,0x43,0x10,0x10,0x01}; //½ÓÊÕµØÖ·
//***************************************NRF24L01¼Ä´æÆ&pide;Ö¸Áî*******************************************************
#define READ_REG 0x00 // ¶Á¼Ä´æÆ&pide;Ö¸Áî
#define WRITE_REG 0x20 // д¼Ä´æÆ&pide;Ö¸Áî
#define RD_RX_PLOAD 0x61 // ¶ÁÈ¡½ÓÊÕÊý¾ÝÖ¸Áî
#define WR_TX_PLOAD 0xA0 // д´ý·¢Êý¾ÝÖ¸Áî
#define FLUSH_TX 0xE1 // ³åÏ´·¢ËÍ FIFOÖ¸Áî
#define FLUSH_RX 0xE2 // ³åÏ´½ÓÊÕ FIFOÖ¸Áî
#define REUSE_TX_PL 0xE3 // ¶¨ÒåÖظ´×°ÔØÊý¾ÝÖ¸Áî
#define NOP 0xFF // ±£Áô
//*************************************SPI(nRF24L01)¼Ä´æÆ&pide;µØÖ·****************************************************
#define CONFIG 0x00 // ÅäÖÃÊÕ·¢×´Ì¬£¬CRCУÑéģʽÒÔ¼°ÊÕ·¢×´Ì¬ÏìÓ¦·½Ê½
#define EN_AA 0x01 // ×Ô¶¯Ó¦´ð¹¦ÄÜÉèÖÃ
#define EN_RXADDR 0x02 // ¿ÉÓÃÐŵÀÉèÖÃ
#define SETUP_AW 0x03 // ÊÕ·¢µØÖ·¿í¶ÈÉèÖÃ
#define SETUP_RETR 0x04 // ×Ô¶¯ÖØ·¢¹¦ÄÜÉèÖÃ
#define RF_CH 0x05 // ¹¤×&pide;ƵÂÊÉèÖÃ
#define RF_SETUP 0x06 // ·¢ÉäËÙÂÊ¡¢¹¦ºÄ¹¦ÄÜÉèÖÃ
#define STATUS 0x07 // ״̬¼Ä´æÆ&pide;
#define OBSERVE_TX 0x08 // ·¢Ëͼà²â¹¦ÄÜ
#define CD 0x09 // µØÖ·¼ì²â
#define RX_ADDR_P0 0x0A // ƵµÀ0½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P1 0x0B // ƵµÀ1½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P2 0x0C // ƵµÀ2½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P3 0x0D // ƵµÀ3½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P4 0x0E // ƵµÀ4½ÓÊÕÊý¾ÝµØÖ·
#define RX_ADDR_P5 0x0F // ƵµÀ5½ÓÊÕÊý¾ÝµØÖ·
#define TX_ADDR 0x10 // ·¢Ë͵ØÖ·¼Ä´æÆ&pide;
#define RX_PW_P0 0x11 // ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P1 0x12 // ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P2 0x13 // ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P3 0x14 // ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P4 0x15 // ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define RX_PW_P5 0x16 // ½ÓÊÕƵµÀ0½ÓÊÕÊý¾Ý³¤¶È
#define FIFO_STATUS 0x17 // FIFOÕ»ÈëÕ»³ö״̬¼Ä´æÆ&pide;ÉèÖÃ
//**************************************************************************************
void Delay(unsigned int s);
void inerDelay_us(unsigned char n);
void init_NRF24L01(void);
uint SPI_RW(uint uchar);
uchar SPI_Read(uchar reg);
void SetRX_Mode(void);
uint SPI_RW_Reg(uchar reg, uchar value);
uint SPI_Read_Buf(uchar reg, uchar *pBuf, uchar uchars);
uint SPI_Write_Buf(uchar reg, uchar *pBuf, uchar uchars);
unsigned char nRF24L01_RxPacket(unsigned char* rx_buf);
void nRF24L01_TxPacket(unsigned char * tx_buf);
//*****************************************³¤ÑÓʱ*****************************************
void Delay(unsigned int s)
{
unsigned int i;
for(i=0; i<s; i++);
for(i=0; i<s; i++);
}
//******************************************************************************************
uint bdata sta; //״̬±êÖ¾
sbit RX_DR =sta^6;
sbit TX_DS =sta^5;
sbit MAX_RT =sta^4;
/******************************************************************************************
/*ÑÓʱº¯Êý
/******************************************************************************************/
void inerDelay_us(unsigned char n)
{
for(;n>0;n--)
_nop_();
}
//****************************************************************************************
/*NRF24L01³õʼ»¯
//***************************************************************************************/
void init_NRF24L01(void)
{
inerDelay_us(100);
CE=0; // chip enable
CSN=1; // Spi disable
SCK=0; //
SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // д±¾µØµØÖ·
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, RX_ADDRESS, RX_ADR_WIDTH);
SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);
SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);
SPI_RW_Reg(WRITE_REG + RF_CH, 0);
SPI_RW_Reg(WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH);
SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);
}
/****************************************************************************************************
/*º¯Êý£ºuint SPI_RW(uint uchar)
/*¹¦ÄÜ£ºNRF24L01µÄSPIдʱÐò
/****************************************************************************************************/
uint SPI_RW(uint uchar)
{
uint bit_ctr;
for(bit_ctr=0;bit_ctr<8;bit_ctr++) // output 8-bit
{
MOSI = (uchar & 0x80); // output 'uchar', MSB to MOSI
uchar = (uchar << 1); // shift next bit into MSB..
SCK = 1; // Set SCK high..
uchar |= MISO; // capture current MISO bit
SCK = 0; // ..then set SCK low again
}
return(uchar); // return read uchar
}
/****************************************************************************************************
/*º¯Êý£ºuchar SPI_Read(uchar reg)
/*¹¦ÄÜ£ºNRF24L01µÄSPIʱÐò
/****************************************************************************************************/
uchar SPI_Read(uchar reg)
{
uchar reg_val;
CSN = 0; // CSN low, initialize SPI communication...
SPI_RW(reg); // Select register to read from..
reg_val = SPI_RW(0); // ..then read registervalue
CSN = 1; // CSN high, terminate SPI communication
return(reg_val); // return register value
}
/****************************************************************************************************/
/*¹¦ÄÜ£ºNRF24L01¶Áд¼Ä´æÆ&pide;º¯Êý
/****************************************************************************************************/
uint SPI_RW_Reg(uchar reg, uchar value)
{
uint status;
CSN = 0; // CSN low, init SPI transaction
status = SPI_RW(reg); // select register
SPI_RW(value); // ..and write value to it..
CSN = 1; // CSN high again
return(status); // return nRF24L01 status uchar
}
/****************************************************************************************************/
/*º¯Êý£ºuint SPI_Read_Buf(uchar reg, uchar *pBuf, uchar uchars)
/*¹¦ÄÜ: ÓÃÓÚ¶ÁÊý¾Ý£¬reg£ºÎª¼Ä´æÆ&pide;µØÖ·£¬pBuf£ºÎª´ý¶Á³öÊý¾ÝµØÖ·£¬uchars£º¶Á³öÊý¾ÝµÄ¸öÊý
/****************************************************************************************************/
uint SPI_Read_Buf(uchar reg, uchar *pBuf, uchar uchars)
{
uint status,uchar_ctr;
CSN = 0; // Set CSN low, init SPI tranaction
status = SPI_RW(reg); // Select register to write to and read status uchar
for(uchar_ctr=0;uchar_ctr<uchars;uchar_ctr++)
pBuf[uchar_ctr] = SPI_RW(0); //
CSN = 1;
return(status); // return nRF24L01 status uchar
}
/*********************************************************************************************************
/*º¯Êý£ºuint SPI_Write_Buf(uchar reg, uchar *pBuf, uchar uchars)
/*¹¦ÄÜ: ÓÃÓÚдÊý¾Ý£ºÎª¼Ä´æÆ&pide;µØÖ·£¬pBuf£ºÎª´ýдÈëÊý¾ÝµØÖ·£¬uchars£ºÐ´ÈëÊý¾ÝµÄ¸öÊý
/*********************************************************************************************************/
uint SPI_Write_Buf(uchar reg, uchar *pBuf, uchar uchars)
{
uint status,uchar_ctr;
CSN = 0; //SPIʹÄÜ
status = SPI_RW(reg);
for(uchar_ctr=0; uchar_ctr<uchars; uchar_ctr++) //
SPI_RW(*pBuf++);
CSN = 1; //¹Ø±ÕSPI
return(status); //
}
/****************************************************************************************************/
/*º¯Êý£ºvoid SetRX_Mode(void)
/*¹¦ÄÜ£ºÊý¾Ý½ÓÊÕÅäÖÃ
/****************************************************************************************************/
void SetRX_Mode(void)
{
CE=0;
SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // IRQÊÕ·¢Íê³ÉÖжÏÏìÓ¦£¬16λCRC £¬Ö&pide;½ÓÊÕ
CE = 1;
inerDelay_us(130);
}
/******************************************************************************************************/
/*º¯Êý£ºunsigned char nRF24L01_RxPacket(unsigned char* rx_buf)
/*¹¦ÄÜ£ºÊý¾Ý¶ÁÈ¡ºó·ÅÈçrx_buf½ÓÊÕ»º³åÇøÖÐ
/******************************************************************************************************/
unsigned char nRF24L01_RxPacket(unsigned char* rx_buf)
{
unsigned char revale=0;
sta=SPI_Read(STATUS); // ¶Áȡ״̬¼Ä´æÆäÀ´ÅжÏÊý¾Ý½ÓÊÕ×´¿ö
if(RX_DR) // ÅжÏÊÇ·ñ½ÓÊÕµ½Êý¾Ý
{
CE = 0; //SPIʹÄÜ
SPI_Read_Buf(RD_RX_PLOAD,rx_buf,TX_PLOAD_WIDTH);// read receive payload from RX_FIFO buffer
revale =1; //¶ÁÈ¡Êý¾ÝÍê³É±êÖ¾
}
SPI_RW_Reg(WRITE_REG+STATUS,sta); //½ÓÊÕµ½Êý¾ÝºóRX_DR,TX_DS,MAX_PT¶¼ÖøßΪ1£¬Í¨¹ýд1À´Çå³þÖжϱêÖ¾
return revale;
}
/***********************************************************************************************************
/*º¯Êý£ºvoid nRF24L01_TxPacket(unsigned char * tx_buf)
/*¹¦ÄÜ£º·¢ËÍ tx_bufÖÐÊý¾Ý
/**********************************************************************************************************/
void nRF24L01_TxPacket(unsigned char * tx_buf)
{
CE=0; //StandBy Iģʽ
SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // ×°ÔؽÓÊն˵ØÖ·
SPI_Write_Buf(WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH);
SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);
CE=1;
inerDelay_us(10);
}
//************************************Ö&pide;º¯Êý************************************************************
void main(void)
{
unsigned char tf =0;
unsigned char TxBuf[20]={0}; //
unsigned char RxBuf[20]={0};
init_NRF24L01() ;
led1=1;led2=1;
P0=0x00;
TxBuf[1] = 1 ;
TxBuf[2] = 1 ;
nRF24L01_TxPacket(TxBuf); // Transmit Tx buffer data
Delay(6000);
P0=0xBF;
while(1)
{
if(KEY1 ==0 )
{
TxBuf[1] = 1 ;
tf = 1 ;
led1=0;
Delay(120);
led1=1;
Delay(120);
}
if(KEY2 ==0 )
{
TxBuf[2] =1 ;
tf = 1 ;
led2=0;
Delay(120);
led2=1;
Delay(120);
}
if (tf==1)
{
nRF24L01_TxPacket(TxBuf); // Transmit Tx buffer data
TxBuf[1] = 0x00;
TxBuf[2] = 0x00;
tf=0;
Delay(1000);
}
SetRX_Mode();
RxBuf[1] = 0x00;
RxBuf[2] = 0x00;
Delay(1000);
nRF24L01_RxPacket(RxBuf);
if(RxBuf[1]|RxBuf[2])
{
if( RxBuf[1]==1)
{
led1=0;
}
if( RxBuf[2]==1)
{
led2=0;
}
Delay(6000); //old is '1000'
}
RxBuf[1] = 0x00;
RxBuf[2] = 0x00;
led1=1;
led2=1;
}
}